- Answer identifies refined defects similar to wire sag, close to shorts, and stray wires for complete evaluation of wire bond integrity
- Superior capacitive-based check methodology allows superior defect detection
- Check platform is excessive quantity manufacturing prepared, able to testing 20 built-in circuits concurrently for throughput of as much as 72,000 models per hour
INDIA – Keysight Applied sciences, Inc. introduces the Electrical Structural Tester (EST), a wire bond inspection resolution for semiconductor manufacturing that ensures the integrity and reliability of digital elements.
The semiconductor business is confronted with testing challenges because of the rising density of chips in mission-critical purposes similar to medical gadgets and automotive programs. Present testing methodologies typically fall quick in detecting wire bond structural defects, which result in pricey latent failures. As well as, conventional testing approaches often depend on sampling strategies that don’t adequately establish wire bond structural defects.
The EST addresses these testing challenges by utilizing cutting-edge nano Vectorless Check Enhanced Efficiency (nVTEP) know-how to create a capacitive construction between the wire bond and a sensor plate. Utilizing this methodology the EST can establish refined defects similar to wire sag, close to shorts, and stray wires to allow complete evaluation of wire bond integrity.
Key advantages of the EST embrace:
- Superior defect detection – Identifies a variety of wire bond defects, each electrical and non-electrical, by analyzing adjustments in capacitive coupling patterns to make sure the performance and reliability of digital elements.
- Excessive quantity manufacturing prepared – Permits throughput of as much as 72,000 models per hour via the power to check as much as 20 built-in circuits concurrently, which boosts productiveness and effectivity in high-volume manufacturing environments.
- Large information analytics integration: Captures defects and enhances yield via superior strategies like marginal retry check (MaRT), dynamic half averaging check (DPAT), and real-time half averaging check (RPAT).
Carol Leh, Vice President, Digital Industrial Options Group Heart of Excellence, Keysight, stated: “Keysight is devoted to pioneering modern options that tackle probably the most urgent challenges within the wire bonding course of. The Electrical Structural Tester empowers chip producers to reinforce manufacturing effectivity by quickly figuring out wire bond defects, guaranteeing superior high quality and reliability in high-volume manufacturing.”
